x86...Good or Bad?

[Phoenix]

I was just wondering what everyone thought about the x86 design, more specifcally, the inefficiency of CISC processing compared to RISC processing. As many of my EE professors can't stand Intel's CISC design, I want to hear the input of anyone who has an opinion.

[Mario]

Its ok

[Althor]

If you wanna do certain things, RISC is cool.
For us gamers CISC is it. We need lot's of different instructions and instruction sets.
Let's take SSE and 3DNow! or Altivec on the G4. These are cool features we don't want to miss. RISC is oldfashioned.
The problem with x86 is not that it's CISC,
it's the damn Gate A20 crap from 10000 years ago. I don't know why we still see it implemented in todays CPUs.
Btw...
I've got a RISC CPU at home in my printer.
It's a 60MHz Spark Lite. ;-)
It should stay where it is right now.

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Althor

[Tank]

I think the x86 architecture has help up reasonably well. I have a friend who's a Macintosh guy and when the new PowerPC chips were coming out, he was telling me about how "superior" it was since it was RISC and all PC's had was crappy CISC. Well, as it turns out, the only area his "superior" chip could overpower a PC was in floating point. Now I don't know about you, but I don't do a lot of 3D rendering or applying filters to images in Photoshop, so therefore his "superior" technology was of little value in normal real world use. His Quake certainly didn't run any faster or with higher FPS. His MS Word wasn't faster.

Not only that, their stuff wasn't very backward compatible. Whereas for the most part, the x86 architecture is very backwards and forewards compatible, until Intel releases their 64bit processors. And if I'm not mistaken, Intel processors for the last several years have been hybrids with a RISC core surrounded by CISC. So if you look at all the factors, the x86 has done well and has had a very long lifespan. I give it a thumbs up!

-Tank

[Arcadian]

Originally posted by Phoenix:
I was just wondering what everyone thought about the x86 design, more specifcally, the inefficiency of CISC processing compared to RISC processing. As many of my EE professors can't stand Intel's CISC design, I want to hear the input of anyone who has an opinion.

Actually, everything after the Pentium Pro has been a RISC core. It accepts the CISC instructions, and part of the pipeline translates the instructions into RISC like micro-ops. All modern x86 processors have this, as RISC like micro-ops allow for easier implementation of Out Of Order Execution, which ends up being a huge performance boost. For example, VIA's Cyrix III processor is an In Order processor, and it performs at half the speed of a Celeron. (Also, the Cyrix III has no L2 cache, but the fact that it is In Order contributes highly to its failure).

As for the x86 architecture in general... some people may consider the architecure primitive, but x86 is still faster than many RISC CPUs out there. Look at systems with the 700MHz Pentium III Xeon with large L2 Cache. Systems with this processor perform faster than HP's PA-RISC, Sun's Ultra Sparc II, and IBM's RS64, which are all RISC processors. In fact, only Compaq's Alpha processor and Sun's brand new Ultra Sparc III perform better than the Pentium III Xeon. But Intel plans on raising the Pentium III Xeon to 900MHz next year, and will also follow with the Pentium 4 Xeon (this name is not confirmed, but most people believe it to be the name of the Xeon based on the Pentium 4). This processor will probably have similar clock speeds as the Pentium 4 (1.4GHz), and should beat the Ultra Sparc III in terms of performance. It may or may not beat the Alpha.

I'd say overall, the x86 architecture is not bad at all.

[gaffo]

hi arcadian! - actually the cyrix-3 (the one that will really be produced/released) will have a level-2 cache on chip - same amout as duron (64k). Also even tho the winchips do not do out of order execution, the funny thing is my winchip-2 (240 mhz) runs exactly equal to a k-6 at same clock (k-6 has twice the number if core transistors and uses out-of-order execution! - whereas my winchip has half the trans. and no OOO and is still same speed! as k-6 ---- so other things too must effect speed- what? haven't got a clue.

[Humus]

I don't like x86 archetecture that much. It's ugly and ineffective. Yes, AMD and Intel have found many ways to work around it, but the real solution would be to drop it all a restart with a brand new instruction set, like IA-64. As memory is becoming more and more of a bottleneck the x86 instruction set is really not a very good thing.

[Phoenix]

What about MIPS processors, they are currnetly being used in several gaming consoles, the Playstation, Nintendo 64 and will be used in the Playstation 2. As far as Intel's RISC core goes, I had heard, correct me if I'm wrong, that they got their design from DEC after the colobrated on a project together,perhaps around the time that Intel bought StongARM, but without DEC's permission.

[blppt]

Originally posted by Phoenix:
What about MIPS processors, they are currnetly being used in several gaming consoles, the Playstation, Nintendo 64 and will be used in the Playstation 2. As far as Intel's RISC core goes, I had heard, correct me if I'm wrong, that they got their design from DEC after the colobrated on a project together,perhaps around the time that Intel bought StongARM, but without DEC's permission.

Yah, some MIPS processors are also used in SGI workstations.

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Pat D.

Visit a music site I write for:
http://members.xoom.com/Awake600

[Arcadian]

Originally posted by Phoenix:
As far as Intel's RISC core goes, I had heard, correct me if I'm wrong, that they got their design from DEC after the colobrated on a project together,perhaps around the time that Intel bought StongARM, but without DEC's permission.

Actually, I know what you're talking about, and I can't quite remember the specifics, but the jist of it was that DEC found a portion of the P6 design that was the same as something they had patented. It wasn't a very large portion of the design, but it was significant to the architecture. Whether Intel did this on purpose or not I don't know, but when DEC was losing money and started selling parts of itself, Intel bought the rights to that technology, as well as DEC's StrongARM division. It turns out that Intel made a good investment with that, since StrongARM has become xScale, and that seems like a very interesting technology.

[Conrad Song]

The average instruction length is small, but this doesn't by much in terms of bandwidth.

The rest is all bad:
o Variable instruction length w/ prefix codes(extra stages to decode x86)
o Variable instruction length (inhibits speculation)
o Lack of registers (limits parallelism)
o Lack of registers (increased ld/st)
o automatic condition code update for each instruction (inhibits speculation, adds a stage)
o Stack FPU (inhibits parallelism)
o Antiquated instruction support (loop, push, pop, call, enter, leave, bitset, rol, ror, xchg, inc, dec, ...), as well as antiquated architectural features
o multi-execution mode h*ll (real-mode x86, V86, protected 32

Is it no wonder AA-64 adds 8 registers by adding a prefix code, or that Intel wants IA-64 for better performance (128 register, register stack, speculative load, conditional execution, fixed length instruction size).

No, we keep x86 for the same reason Microsoft still has to support DOS. Clock speeds are rising because there aren't much more architectural changes to get better performance from an x86 instruction stream. And eventually, it'll be much more difficult to increase clock speed and much more easy to increase parallelism.